
2009 Microchip Technology Inc.
DS39761C-page 301
PIC18F2682/2685/4682/4685
REGISTER 23-28: BnEIDH: TX/RX BUFFER n EXTENDED IDENTIFIER REGISTERS,
HIGH BYTE IN RECEIVE MODE [0
≤ n ≤ 5, TXnEN (BSEL0<n>) = 0](1)
R-x
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EID15:EID8: Extended Identifier bits
Note 1:
These registers are available in Mode 1 and 2 only.
REGISTER 23-29: BnEIDH: TX/RX BUFFER n EXTENDED IDENTIFIER REGISTERS,
HIGH BYTE IN TRANSMIT MODE [0
≤ n ≤ 5, TXnEN (BSEL0<n>) = 1](1)
R/W-x
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EID15:EID8: Extended Identifier bits
Note 1:
These registers are available in Mode 1 and 2 only.
REGISTER 23-30: BnEIDL: TX/RX BUFFER n EXTENDED IDENTIFIER REGISTERS,
LOW BYTE IN RECEIVE MODE [0
≤ n ≤ 5, TXnEN (BSEL<n>) = 0](1)
R-x
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EID7:EID0: Extended Identifier bits
Note 1:
These registers are available in Mode 1 and 2 only.